### Xilinx Processor IP Library

# Change log for axi_lite_ipif

Changes in v1.01.a, introduced in 12.4
12.4 - Changes in VHDL/Verilog/Netlist sources (.vhd, .v, .ngc, .edn)
     New Features:
None
    Resolved Issues:
Fixed [CR<574507>]. The core utilization is reduced. Versions that have this issue: v1.00.a Known Issues /Limitations: none
12.4 - Changes in documentation associated with core
Updated utilization matrix tables

Changes in v1.00.a, introduced in 12.3
12.3 - Changes in VHDL/Verilog/Netlist sources (.vhd, .v, .ngc, .edn)
     New Features:
Created an IPIF library for the AXI Lite interface. This core is usefull to interface the existing IPIC and the AXI4lite
    Resolved Issues:
none Known Issues /Limitations: none

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