Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.7 (ISE) - P.20131013 Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx16
Project ID (random number) 0a8a9a35795c4756893a7fd163ea0eb8.BECF236FAEAA459D8303396D706760F2.1 Target Package: csg324
Registration ID 210655449_178259189_210672038_863 Target Speed: -3
Date Generated 2018-01-16T14:14:18 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i7-4790 CPU @ 3.60GHz CPU Speed 3591 MHz
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i7-4790 CPU @ 3.60GHz CPU Speed 3591 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Multiplexers=1
  • 3-bit 4-to-1 multiplexer=1
Registers=17
  • Flip-Flops=17
MiscellaneousStatistics
  • AGG_BONDED_IO=19
  • AGG_IO=19
  • AGG_SLICE=4
  • NUM_BONDED_IOB=19
  • NUM_BSFULL=8
  • NUM_BSREGONLY=4
  • NUM_BSUSED=12
  • NUM_BUFG=1
  • NUM_LOGIC_O6ONLY=3
  • NUM_LUT_RT_DRIVES_FLOP=5
  • NUM_LUT_RT_EXO5=5
  • NUM_SLICEX=4
  • NUM_SLICE_CONTROLSET=1
  • NUM_SLICE_CYINIT=8
  • NUM_SLICE_FF=17
  • NUM_UNUSABLE_FF_BELS=7
NetStatistics
  • NumNets_Active=53
  • NumNodesOfType_Active_BOUNCEIN=5
  • NumNodesOfType_Active_BUFGOUT=1
  • NumNodesOfType_Active_BUFHINP2OUT=1
  • NumNodesOfType_Active_CLKPIN=4
  • NumNodesOfType_Active_CLKPINFEED=1
  • NumNodesOfType_Active_CNTRLPIN=4
  • NumNodesOfType_Active_DOUBLE=15
  • NumNodesOfType_Active_GENERIC=34
  • NumNodesOfType_Active_GLOBAL=10
  • NumNodesOfType_Active_INPUT=1
  • NumNodesOfType_Active_IOBIN2OUT=18
  • NumNodesOfType_Active_IOBOUTPUT=18
  • NumNodesOfType_Active_LUTINPUT=23
  • NumNodesOfType_Active_OUTBOUND=47
  • NumNodesOfType_Active_OUTPUT=18
  • NumNodesOfType_Active_PADINPUT=3
  • NumNodesOfType_Active_PADOUTPUT=16
  • NumNodesOfType_Active_PINBOUNCE=12
  • NumNodesOfType_Active_PINFEED=35
  • NumNodesOfType_Active_QUAD=10
  • NumNodesOfType_Active_REGINPUT=9
  • NumNodesOfType_Active_SINGLE=38
SiteStatistics
  • BUFG-BUFGMUX=1
  • IOB-IOBM=9
  • IOB-IOBS=10
  • SLICEX-SLICEL=1
  • SLICEX-SLICEM=1
SiteSummary
  • BUFG=1
  • BUFG_BUFG=1
  • FF_SR=5
  • INVERTER=1
  • IOB=19
  • IOB_IMUX=16
  • IOB_INBUF=16
  • IOB_OUTBUF=3
  • LUT5=5
  • LUT6=3
  • PAD=19
  • REG_SR=12
  • SLICEX=4
 
Configuration Data
FF_SR
  • CK=[CK:5] [CK_INV:0]
  • SRINIT=[SRINIT0:5]
  • SYNC_ATTR=[ASYNC:5]
IOB_OUTBUF
  • DRIVEATTRBOX=[12:3]
  • SLEW=[SLOW:3]
  • SUSPEND=[3STATE:3]
REG_SR
  • CK=[CK:12] [CK_INV:0]
  • LATCH_OR_FF=[FF:12]
  • SRINIT=[SRINIT0:12]
  • SYNC_ATTR=[ASYNC:12]
SLICEX
  • CLK=[CLK:4] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=1
  • O=1
BUFG_BUFG
  • I0=1
  • O=1
FF_SR
  • CK=5
  • D=5
  • Q=5
  • SR=5
INVERTER
  • IN=1
  • OUT=1
IOB
  • I=16
  • O=3
  • PAD=19
IOB_IMUX
  • I=15
  • I_B=1
  • OUT=16
IOB_INBUF
  • OUT=16
  • PAD=16
IOB_OUTBUF
  • IN=3
  • OUT=3
LUT5
  • A5=5
  • O5=5
LUT6
  • A1=3
  • A2=3
  • A3=3
  • A4=3
  • A5=3
  • A6=3
  • O6=3
PAD
  • PAD=19
REG_SR
  • CK=12
  • D=12
  • Q=12
  • SR=12
SLICEX
  • A1=1
  • A2=1
  • A3=1
  • A4=1
  • A5=3
  • A6=1
  • AMUX=2
  • AQ=4
  • AX=3
  • B1=1
  • B2=1
  • B3=1
  • B4=1
  • B5=3
  • B6=1
  • BMUX=2
  • BQ=4
  • BX=3
  • C1=1
  • C2=1
  • C3=1
  • C4=1
  • C5=2
  • C6=1
  • CLK=4
  • CMUX=1
  • CQ=4
  • CX=3
  • SR=4
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -i -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
bitgen 1 1 0 0 0 0 0
map 1 1 0 0 0 0 0
ngdbuild 7 7 0 0 0 0 0
par 1 1 0 0 0 0 0
trce 1 1 0 0 0 0 0
xst 5 5 0 0 0 0 0
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserBrowsedStrategyFiles=C:/Xilinx/14.7/ISE_DS/ISE/data/default.xds PROP_UserConstraintEditorPreference=Text Editor
PROP_intProjectCreationTimestamp=2018-01-16T13:37:35 PROP_intWbtProjectID=BECF236FAEAA459D8303396D706760F2
PROP_intWbtProjectIteration=1 PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No PROP_lockPinsUcfFile=changed
PROP_xilxBitgStart_IntDone=true PROP_AutoTop=true
PROP_DevFamily=Spartan6 PROP_DevDevice=xc6slx16
PROP_DevFamilyPMName=spartan6 PROP_DevPackage=csg324
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-3
PROP_PreferredLanguage=VHDL FILE_UCF=1
FILE_VHDL=2
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FDC=17 NGDBUILD_NUM_IBUF=15 NGDBUILD_NUM_INV=1
NGDBUILD_NUM_LUT6=3 NGDBUILD_NUM_OBUF=3
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FDC=17 NGDBUILD_NUM_IBUF=15 NGDBUILD_NUM_IBUFG=1
NGDBUILD_NUM_INV=1 NGDBUILD_NUM_LUT6=3 NGDBUILD_NUM_OBUF=3 NGDBUILD_NUM_TS_TIMESPEC=1
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx16-3-csg324
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5