Release Notes For ModelSim Altera 10.5

Feb 12 2016

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Index to Release Notes

Key Information
Release Announcements in 10.5
Base Product Specifications in 10.5
Compatibility Issues with Release 10.5
User Interface Defects Repaired in 10.5
SystemVerilog Defects Repaired in 10.5
VHDL Defects Repaired in 10.5
SystemC Defects Repaired in 10.5
WLF and VCD logging Defects Repaired in 10.5
General Enhancements in 10.5
User Interface Enhancements in 10.5
SystemVerilog Enhancements in 10.5
SystemC Enhancements in 10.5
Coverage Enhancements in 10.5

Key Information

The following lists the supported platforms:
- win32aloem - Windows 7, Windows 8
- linuxaloem - RedHat Enterprise Linux 5 and 6, SUSE Linux Enterprise Server 10 and 11

Release Announcements in 10.5

[nodvtid] - In the next major release (10.6), support for Redhat Enterprise Linux (RHEL) 5 and Suse Linux Enterprise Server (SLES) 10 will be dropped.
[nodvtid] -
Release 10.5 uses FLEXnet v11.13.1.2 server, v11.13.0.2 client.
For floating licenses, it will be necessary to verify that the vendor daemon (i.e., mgcld) and the license server (i.e., lmgrd) have FLEXnet versions equal to or greater than 11.13.0.2. If the current FLEXnet version of your vendor daemon and lmgrd are less than 11.13.0.2 then it will be necessary to stop your license server and restart it using the vendor daemon and lmgrd contained in this release.
If you use node locked licenses you don't need to do anything. This release will update licensing to MSL v2015_1_patch2 with MGLS v9.13_5.4 and PCLS v9.13.5.2
In summary, this release uses the following license versions:
- FLEXnet v11.13.1.2 server, v11.13.0.2 client
- MSL v2015_1_patch2
- MGLS v9.13_5.4
- PCLS v9.13.5.2
- [nodvtid] -
  10.5 release onwards, Questa will be using Microsoft Visual Studio 12 a.k.a Visual Studio 13. This would mean that all the executables shipped with the 10.5 release and onwards would be linked in with "msvcr120.dll". If you have SystemC or PLI/VPI/DPI/FLI libraries compiled with older release with any gcc compiler shipped with the product, those will have to be re-compiled with 10.5. Windows platform compiler details is as follows:
  - "gcc-4.2.1-mingw32vc9" has been replaced with "gcc-4.2.1-mingw32vc12" and is shipped with the product.
  - "gcc-4.5.0-mingw64" has been replaced with "gcc-4.5.0-mingw64vc12" and is shipped with the product.
  - "gcc-4.5.0-mingw32vc9" has been replaced with "gcc-4.5.0-mingw32vc12" and will be available for download on a request basis.
    Compiler versions have not been changed compared to previous release. Please refer to User's Manual for more details.
  - [nodvtid] - (source) In the next major release (10.6)
    - support for Windows 8.0 will be dropped. No change for Windows 8.1
    - support for gcc-4.3.3-linux and gcc-4.3.3-linux_x86_64 will be dropped
  Base Product Specifications in 10.5
  - [nodvtid] -
    [Supported Platforms]
    Linux RHEL 5 x86/x86-64
    Linux RHEL 6 x86/x86-64
    Linux RHEL 7 x86/x86-64
    Linux SLES 10 x86/x86-64
    Linux SLES 11 x86/x86-64
    Windows 7 x86/x64
    Windows 8 x86/x64
    
    [Supported GCC Compilers (for SystemC)]
    gcc-4.7.4-linux/gcc-4.7.4-linux_x86_64
    gcc-4.5.0-linux/gcc-4.5.0-linux_x86_64
    gcc-4.3.3-linux/gcc-4.3.3-linux_x86_64
    gcc-4.2.1-mingw32vc12
    
    [OVL (shipped with product)]
    v2.8.1
    
    [VHDL OSVVM (shipped with product)]
    v2014.07
    
    [Licensing]
    FLEXnet v11.13.1.2 server, v11.13.0.2 client
    MSL v2015_1_patch2
    MGLS v9.13_5.4
    PCLS v9.13.5.2
  Compatibility Issues with Release 10.5
  Key Information Compatibility
  - [nodvtid] - (source) A bug related to Windows DLL symbol export is fixed in 10.5 and later. A side effect of the fix is that there may be incompatibility on Windows platforms regarding existing DPI usage. The required setup change is one of the followings:
    1) Use vlog -dpiheader to generate DPI routine prototype declarations. Include generated DPI header file in the DPI code.
    OR
    2) If DPI header is not being generated or used, one needs to manually attach DPI_DLLESPEC in front of all DPI routines. DPI_DLLESPEC is a standard macro defined inside svdpi.h
    The generated DPI header flow is recommended. Failing to do the above will incur the following warning at elab time
```
# ** Warning: (vsim-3770) Failed to find user specified function 'foo' in DPI
C/C++ source files.
```
    and the fatal error at runtime:
```
# ** Fatal: (vsim-160) test.sv(11): Null foreign function pointer encountered wh
en calling 'foo'
```
  SystemVerilog Compatibility
  - dvt80536 - (source) It is not permitted to change the protected status of an existing design unit by recompiling it, it must be deleted from the library and then recompiled.
  - [nodvtid] - (source, results) There has been a change in the VPI interface to vpiAssertion class objects. The SystemVerilog 2012 LRM indicates that vpiAssertion objects may be iterated for from vpiInstance class objects only, not from all vpiScopes, however assertion objects may in fact be under other scope class parents. We have previously added these sub-scope descendant assertions to the instance assertion. This change makes the assertion iteration valid on all scope objects to bring it into line with similar vpiVariable iterations. A consequence is that sub-scope iterations are necessary to find all the assertions in an instance.
  - dvt79480 - (results) Fixed a bug which results in reversed bit connections, when a concat expression is passed to an unpacked port
  - dvt75654 - (results) SDF back-annotation now works with anonymous Non-ansi type source and destination ports.
  - dvt73179 - (results) Fix an improper vopt optimization when DPI import call is involved in an always block.
  - dvt84015 - (results) The non-standard feature of System Verilog "force" and "release" statements that target a select of a variable (as opposed to a net) do not fully support a non-constant rhs. A warning is issued to this effect, and the resulting behavior may not match the expected behavior for force and release semantics involving a non-constant rhs. The behavior has been changed in this release such that the rhs is evaluated just once at the time the force is executed and is applied as though it is constant and does not update forced value subsequently when any of the rhs variables change value. Previously, the forced value would be updated when the rhs variables change value, but any subsequent force or release on the same target would not cancel the force. This old behavior can be selected by specifying the vsim -reevalvarbitforces option.
  - dvt70976 - (results) SystemVerilog strings are now reported separately from dynamic arrays in the capacity report.
  VHDL Compatibility
  - dvt75261 - (source) If a locally static range of the first form (A'RANGE or A'REVERSE_RANGE) was used as the index range in an array subtype indication, there was no check that the range bounds were compatible with the index subtype of the base array type. This has been fixed.
  - dvt77769 - (results) A type conversion from a floating point type to an integer type will now produce an Error message if the floating point value is outside the range of a signed 32-bit integer. Also, a type TIME expression involving a floating point expression will produce an Error message if the result is outside the range of a 64-bit signed integer; in this case, the lower bound is -9223372036854775807, which is the smallest position number allowed for type TIME. Finally, a type conversion will check that the result belongs to the subtype denoted by the type mark of the target type.
  Coverage Compatibility
  - dvt69525 - (results) Some toggle nodes of a VHDL record were missing in viewcov mode
  - dvt28804 - (results) The -checkinputs switch is added in vcover merge to skip and report corrupted UCDB input files.
  General Compatibility
  - [nodvtid] - (results) There are multiple VPI changes to the class model to align it more closely to the LRM, and to make it more useable. Class object names are now aligned to the GUI names. More vpi_handle and vpi_iterate queries have been implemented, affecting among other things vpiClassTypespec, vpiClassObj, and vpiClassDefn objects. Queries for file and line information on class objects will return an error, as these objects are not anchored by definition to the source code.
  User Interface Compatibility
  - [nodvtid] - (results) A new feature called VHDL Access Path Expressions has been introduced which provides improved visibility and a more intuitive way of viewing VHDL access variables and objects in the Wave Window. Some of the features of vhdl access path expressions are:
    - More descriptive pointer values. Values are Dynamic Object Identifiers instead of hexadecimal memory address.
    - Access references may be expanded in place in the wave window rather than having to inspect individual access objects one by one.
    - Ability to add access_var.all to see dereferenced object values.
    - Ability to "cast" unconstrained arrays to constrained array type.
    - The [accessinfo] command gives metrix and reports about access object usage.
    - Enabled with -accessobjdebug switch or AccessObjDebug modelsim.ini variable setting.
  - dvt78258 - (results) Scripting of the simulator now supports nested "vsim -do" operations. The do-file specified in a vsim command that contains another vsim command with it's own do-file option will now execute the nested do-file. Previously, the -do option in a nested vsim command was ignored, with a warning. Existing scripts that have "vsim -do" commands will see different behavior.
  - [nodvtid] - (results) Vsim has always wrapped long output lines in the transcript file. Lines longer than 3000 characters are wrapped onto subsequent lines. There are now two new control settings that effect this wrapping behavior. The settings can be modified by changing variables in the modelsim.ini file, or by using two new "transcript" commands in a do file.
    WrapMode: The WrapMode variable controls wrapping of output lines in the transcript file. A mode of 0 will turn off wrapping, mode 1 enables wrapping, and mode 2 enables wrapping and adds a continuation character, '\', at the end of each wrapped line except the last one. The default value for WrapMode is 0. (Note: this is a change from the behavior in 10.4).
    WrapColumn: The WrapColumn variable defines the column width where the line gets wrapped. This column is somewhat soft; the wrap will occur at the first white-space character after reaching the WrapWSColumn column or at exactly the column width if no white-space is found. The default value for WrapColumn is 30000.
    WrapWSColumn: The wrap will occur at the first white-space character after reaching the WrapWSColumn. If there is no white-space, the wrap will occur at the WrapColumn. The default value for WrapWSColumn is 27000.
    The command form of these variables are "transcript wrapmode ?n?", "transcript wrapcolumn ?n?", and "transcript wrapwscolumn ?n?", respectively.
  Release Announcements Compatibility
  - [nodvtid] - (source) In the next major release (10.6)
    - support for Windows 8.0 will be dropped. No change for Windows 8.1
    - support for gcc-4.3.3-linux and gcc-4.3.3-linux_x86_64 will be dropped
  User Interface Defects Repaired in 10.5
  - dvt74126 - In Questa, the "change" command could crash or incorrectly ignore ".super" psuedo scope. This has been corrected.
  - [nodvtid] - The "Filter Waveform..." dialog has been improved. The old dialog caused confusion and unintended usage errors.
  - dvt63380 - The find subcommands "insource" and "infiles" now work in -batch mode.
  - dvt18485 - The Search bar in each window is now persistent. This means if a Search bar is open within a window when the application is closed, the next time the application is launched and the window opened, the Search bar will be visible as well.
  - dvt19881 - Using the Find feature in the Preference Dialog box will now search the entire contents, no longer requiring the that the tree be expanded first.
  - dvt83573 - The Wave window view will jump to the end time when selecting items in the Structure window. This issue as been fixed. To work around the problem in existing releases, set PrefWave(ScrollOnRunComplete) 0, however, with this option disabled, the Wave window will not scroll to the end after a run either.
  - dvt74842 - When saving a window image on Windows, the error "expected integer but got "-x"" is reported. This problem has been fixed.
  SystemVerilog Defects Repaired in 10.5
  - dvt63470 - Vsim memory size would grow significantly after 'restart' commands in designs with large SystemVerilog packages.
  - dvt74214 - Fixed a crash in a DPI import call caused by using class member fields as the actual arguments of unsized packed open array.
  - dvt74468 - The implied @* sensitivity should exclude variables referenced within a sequential delay.
  - dvt73310 - Traversing individual words of large SV memories using vpi_iterate/vpi_scan functions caused huge memory usage.
  - dvt68524 - Fixed a bug where vopt/vlog are crashing due to a function call inside unelaborated generate. This was happening in few cases when the used function is defined after generate.
  - dvt76661 - The compiler incorrectly issued a "data size overflow" error for large unpacked arrays and structures that overflowed a 32-bit integer size even when compiled for 64-bit.
  - [nodvtid] - In some cases redefined macros were not overwriting previous macro definitions.
  - dvt79480 - (results) Fixed a bug which results in reversed bit connections, when a concat expression is passed to an unpacked port
  - dvt80393 - Specifying multiple comma-delimited extensions via the "vsim -svext" switch would result in an error. This issue has been fixed.
  - dvt80536 - (source) It is not permitted to change the protected status of an existing design unit by recompiling it, it must be deleted from the library and then recompiled.
  - dvt75654 - (results) SDF back-annotation now works with anonymous Non-ansi type source and destination ports.
  - [nodvtid] - Vsim crashed with array index references in an inline randomization constraint where the index variable was defined inside a begin..end block.
  - dvt83603 - Using a parameter array index reference as the offset in an indexed slice range could lead to an internal error like:
    # ** Error: test.sv(5): Questa has encountered an unexpected internal error: ../../src/vlog/vgencode.c(212).
  - dvt73179 - (results) Fix an improper vopt optimization when DPI import call is involved in an always block.
  - dvt84015 - (results) The non-standard feature of System Verilog "force" and "release" statements that target a select of a variable (as opposed to a net) do not fully support a non-constant rhs. A warning is issued to this effect, and the resulting behavior may not match the expected behavior for force and release semantics involving a non-constant rhs. The behavior has been changed in this release such that the rhs is evaluated just once at the time the force is executed and is applied as though it is constant and does not update forced value subsequently when any of the rhs variables change value. Previously, the forced value would be updated when the rhs variables change value, but any subsequent force or release on the same target would not cancel the force. This old behavior can be selected by specifying the vsim -reevalvarbitforces option.
  VHDL Defects Repaired in 10.5
  - dvt72143 - If an uninstantiated package contains signal declarations, and an instance of the package is associated with an interface package in an entity, package, or subprogram instantiation, accesses to the signals could lead to simulator error messages of the form:
```
# ** INTERNAL ERROR: pkgref: export lookup failed for package #8[7]
```
  - [nodvtid] - An object of a composite type that has a subelement of some null-range scalar subtype, when declared with no default expression (class SIGNAL object) or initial value expression (class VARIABLE object), would not cause an error as it should. Such object declarations are illegal because no value (default/initial or otherwise) can be compatible with such a composite (sub)type.
  - [nodvtid] - The predefined package ENV was introduced in VHDL 2008, to be in library STD. While this package is available for VHDL versions other than VHDL 2008, using this package will produce a warning message unless the VHDL 2008 language version is in effect. It is possible to suppress or otherwise change the message severity level.
  - dvt72793 - A PROCESS(ALL) statement in which the ALL represents no signals would result in the process having no termination (infinite loop).
  - dvt73051 - Fixed elaboration crash with subelement association. The formal must be an element or subelement of a multidimensional port and the actually a 2008 signal expression.
  - [nodvtid] - Aggregates of signals in subprograms, either as parameters to other subprogram, or as targets of signal assignments could cause a crash if the aggregate contained both parameters and non-parameter signals.
  - dvt74124 - Vcom could fail with an internal error when a port map statement is present on a block
  - dvt74313 - If an attribute that returned a range is used as the expression to a return statement, incorrect machine code could be generated. A range is not a valid return value and is now flagged as an error a compile time.
  - [nodvtid] - Logging of composite type variables with embedded access type subelements would sometimes not detect and record changes to those subelements.
  - dvt75643 - Performance of designs that perform many file open/close operations could degrade significantly when transitioning from any version prior to 10.4 to 10.4. File open/close processing has been improved to eliminate this degradation.
  - dvt75836 - Compilation of VHDL source code would generate temporary data in a flat library causing it to grow without bound. The temporary data is now cleaned up at the end of every compile.
  - dvt71451 - Predefined attribute A'ELEMENT could not have as its prefix a function call. The LRM is not clear on this since A must be either an array type name or appropriate for an array object, and a function call is neither. But because other attributes like A'RANGE where A is a function call are handled as legal, the A'ELEMENT attribute now also allows this. Further, as a non-compliant extension of the language O'SUBTYPE may also have O be a function call.
  - dvt74123 - In a subprogram appearing in a protected type body, another subprogram call with a named association element for a formal having the same name as a data member of the protected type would cause a compiler error. This is now fixed.
  - dvt73707 - Individual association involving a multidimensional array type formal whose index subtypes are enumeration types would not compile. This has been fixed.
  - dvt74843 - The compiler would hang if it encountered a VHDL error involving a type declaration of an array type whose element subtype is an incomplete type of the same name as the array type itself.
  - dvt70676 - Some uses of A'RANGE (and A'REVERSE_RANGE) where a value (not a range) is required were not being caught as errors by the compiler.
  - [nodvtid] - Writing a value to a file of a type whose type mark is a scalar subtype that has a range constraint would not check that the value belonged to the subtype. This has been fixed.
  - dvt67887 - Associating a signal alias with a port, where the subtype indication of the alias declaration is a partially constrained record, would result in a design that would fail during elaboration.
  - dvt73631 - If a subprogram instantiates a package, and then calls a subprogram of the package, variables of the called subprogram may not be visible or accessible in the graphical interface or through the examine command. In addition, if the design is optimized with vopt using the +cover switch to enable code coverage, during elaboration of the design, the simulator's console terminal may report errors of the form:
```
../../src/vsim/rtu.c(xxxx). Please contact Questa support at http://supportnet.mentor.com/
```
  - dvt77077 - A crash could occur when using an output port as the actual to a subprogram formal that is a signal Rising_edge is an example of such a subprogram. Because of optimization, this doesn't no occur for all cases and maybe affected by the use of switches like -no1164 and -O1.
  - dvt76995 - A variable of a protected type that contains a data member that is of class FILE could not be displayed, examined, or logged properly. Since FILEs themselves cannot be logged, such a protected type variable will have the FILE data member be shown as "Not Loggable", and the WLF file (for post-sim viewing) will not show the variable as having this FILE at all.
  - dvt77275 - A Fatal error during elaboration could occur within an optimized vhdl process if signal valued attributes are used within that process. The name reported for the optimized processed will start #MERGED#.
  - [nodvtid] - Bad machine code would be generated in the case of an access type to an generic type and the generic type's actual is a record type. This could result in crashes or incorrect simulation
  - dvt77420 - Memory corruption could occur if a generic package is instantiated within the scope of a subprogram. Instances of a generic package outside of subprogram is unaffected by this issue. The memory corruption has been fixed.
  - dvt77769 - (results) A type conversion from a floating point type to an integer type will now produce an Error message if the floating point value is outside the range of a signed 32-bit integer. Also, a type TIME expression involving a floating point expression will produce an Error message if the result is outside the range of a 64-bit signed integer; in this case, the lower bound is -9223372036854775807, which is the smallest position number allowed for type TIME. Finally, a type conversion will check that the result belongs to the subtype denoted by the type mark of the target type.
  - dvt79007 - A package-declared signal used as an element of an array begin associated via individual association with a class signal procedure formal, where the procedure is declared in a place that is not the package, could cause a crash.
  - dvt79195 - Type conversion from a floating point value to an integer value of type INTEGER would incorrectly report an error if the value was the legal value of -2147483648; likewise for 2147483647.
  - dvt78557 - Reference to an element or slice of a signal array whose elements are an interface type could result in a fatal error with the following message:
```
** Fatal: (SIGSEGV) Bad handle or reference.
```
  - dvt79119 - The "change" command would not work if attempted on an access object or member of such.
  - dvt79538 - The in some case, if a VHDL block has unconstrained output ports The error
    # ** Fatal: (vsim-3420) Array lengths do not match. Left is 0 (0 to 3). Right is (UNDEFINED) (UNCONSTRAINED ARRAY).
    could occur.
  - dvt76973 - Variable (including protected type data member variable) whose type was array of access to record, could cause a simulator crash if the vsim command "vsim" was used to load another (or same) design during the same session of the GUI.
  - dvt75261 - (source) If a locally static range of the first form (A'RANGE or A'REVERSE_RANGE) was used as the index range in an array subtype indication, there was no check that the range bounds were compatible with the index subtype of the base array type. This has been fixed.
  - dvt79780 - Logging an alias to a signal that is of a resolved composite type would crash the simulator.
  - dvt80970 - If a instance of a generic package is made directly visible with a via a use statement. Multiple references to the package will result in the error
```
** Error: fails.vhd(4): (vcom-1078) Identifier "pkg" is not directly visible. Potentially visible declarations are:
work.pkg in library work (package)
work.pkg at pkg.vhd(1) (declaration)
```
  - dvt80408 - Having an entity whose name is 200 character long or longer could cause the following error during optimization.
```
** Fatal: (vopt-8) Problem while reading data file
"/export/home/designtree/work/top_opt/vopt4km4ma".
** Error: (vopt-2064) Compiler back-end code generation process terminated with
code 2.
```
  - dvt81349 - Aggregate slices could compute incorrect values if the type of the aggregate is a subtype of std_logic_vector or std_ulogic_vector and is defined in a package not compiled with -2008.
  - dvt81528 - Occasionally vcom, vopt, or vlog, could crash unexpectedly because of the command line arguments. Slightly changing the argument number or order can work around the problem.
  - dvt81757 - Fixes crashes at design load time as wells on commands that work on bits of a composite port like driver, add log, add wave, and other similar commands. The crash required that the actual connected to the port be a non-static expression.
  - dvt82810 - A function containing a nested function called to initialize a subtype of an object declared in the outer function could cause the design to crash when loaded.
  - dvt83738 - Incorrect code was generated for constant-index signal assignments when the array elements are generic types. As a result, the simulator could crash.
  - dvt81426 - If an array-valued signal has only constant-index signal assignments in a particular process, and the process contains an expression involving either the 'driving or 'driving_value attribute, incorrect code was generated for the attribute expression. As a result, the simulator could crash during evaluation of the expression.
  SystemC Defects Repaired in 10.5
  - dvt78678 - Fixed sccom leaving object files in the current working directory on a compile failure.
  WLF and VCD logging Defects Repaired in 10.5
  - dvt65590 - The wlfman filter command could produce incorrect results when filtering Verilog nets that shared bits with other Verilog nets.
  - dvt75538 - Using the -wlftlim or -wlfslim switches to control the size of the WLF file could result in the wave and list displays not being updated correctly following a simulation run. The data in the WLF file was correct, but the windows would get confused by missed communications from the simulation kernel. The problem has been fixed.
  General Enhancements in 10.5
  - dvt73792 -
    1. The vsim "checkpoint" command now accepts a file or a directory as the pathname.
    Syntax:
    checkpoint [-dir] <pathname>
    The following are the two valid scenarios for specifying a directory as the <pathname>. In both these cases a checkpoint file named 'vsim.cpt' is created in the specified directory.
    - - The "-dir" option is specified with the <pathname>. If the directory doesn't exist then a new one is created.
    - - The "-dir" option is not specified with the <pathname> but it represents a pre-exisiting directory.
    It is an error if "-dir" is specified but the <pathname> represents a regular file.
    
    2. vsim's "restore" CLI command and the command line switch "-restore" now accept a file or a directory as the pathname. (The syntax has not changed, only the semantics).
    Syntax:
    restore <pathname>
    - - If the <pathname> represents a pre-exisiting directory, then a checkpoint file named 'vsim.cpt' must exist in the specified directory.
    - - Otherwise the <pathname> must represent a checkpoint file.
    3. When the checkpoint is represented by a directory the following new function, declared in "mti.h" file, returns that directory name.
    extern char * mti_GetCheckpointDirname PROTO((void));
  - dvt25231 - The following license related items are added to 'simstats' command report.
    
    [simstats verbose]
    New 'elab' report item is added for checked-out license features names.
    Example:
    # elab: license features used qhsimvl
    
    [simstats license]
    New 'License Statistics' section is added for checkout time and checked-out
    license features names. Example:
    # License Statistics
    # license: checkout time 0.05 s
    # license: features used qhsimvl
  - [nodvtid] - (results) There are multiple VPI changes to the class model to align it more closely to the LRM, and to make it more useable. Class object names are now aligned to the GUI names. More vpi_handle and vpi_iterate queries have been implemented, affecting among other things vpiClassTypespec, vpiClassObj, and vpiClassDefn objects. Queries for file and line information on class objects will return an error, as these objects are not anchored by definition to the source code.
  - [nodvtid] - A new condition option has been added to the "bp" command. The "-ancestor" condition option added to a breakpoint will stop the simulation only when any ancestor parent of the process matches the given process-name.
  - [nodvtid] - Usability improvements and bug fixes have been made to Questa's library search features. There are no known incompatibilities with earlier library search operations. All working designs will continue to elaborate as they have in the past. The following new features have been added to Questa's library search algorithm:
    1. A new option called -libverbose has been added to vopt and vsim. Specifying this option will result in more verbose messaging about library search and resolution operations.
    2. The -libverbose=prlib option will print out the -L or -Lf option that was used to locate each design unit loaded by vopt or vsim. This information is printed to the right of the existing "-- Loading design unit xyz..." messages.
    3. Libraries containing top design units that aren't explicitly present in the set of -L/-Lf options are now implicitly promoted to searchable libraries. They are placed at the end of the library search order. They will appear as -Ltop in the output of the -libverbose option.
    4. Physical libraries which appear in -L/-Lf options with filesystem path delimiters (i.e. '.' or '/') were previously not handled robustly. Now such options will create an implicit logical->physical mapping, as if a vmap command had been issued when variable AutoLibMappingis set to 1 in modelsim.ini.
    Example:
    vopt -L ./path/to/lib1 -o opttop top
    This command will result in an implicit mapping of "lib1 => ./path/to/lib1". This implicit mapping will occur as long as there is no other logical library present with a matching name (lib1 in this case). Any implicit mapping which does not occur for any reason is flagged with a suppressible Note.
    5. Questa now searches for top level du's in -L/-Lf paths. These are searched after vsim -lib and vopt -work.
    6. vsim and vopt now print a list of all visible top level libraries if a top level du can't be found during the library search algorithm.
  - dvt29640 - A new option has been added to vsim to control behavior of the simulator when there is an elaboration error.
    The option -onElabError value will direct the simulator to take different actions based on the given value.
    Option values for this switch are "exit", "resume", and "stop".
    - exit - vsim will exit after getting an elaboration error.
    - stop - vsim will stop and return control to the user. If a do file script is executing at the time of the error, the script will be paused.
    - resume - vsim will return control to the running do script. If the -do option was given on the command line and has not yet started executing, vsim will run the do script. If no do script is given, control is returned to the user.
    The default behavior when no -onelaberror option is specified is to "exit" when running in -c mode, and to "stop" when running in -i or -gui mode.
    The option may also be specified using lowercase: -onelaberror.
  - [nodvtid] - For IP protection using encryption for VHDL and SV, we have added a new public key named MGC-VERIF-SIM-RSA-2 that has 2048 bit key length. This enhances our security and conforms to the recommendations in IEEE 1735-2014. All users of IP protection are encouraged to begin using this key. IP authors should verify that their Modelsim and Questasim product version requirements are satisfied. This key is not supported in older releases.
  - dvt84671 - For IP protection in VHDL and SV, a new 2048 bit public key named MGC-VERIF-SIM-RSA-2 has been added. This provides enhanced security and conforms to recommendations in IEEE 1735-2014. IP authors are encouraged to start using this key immediately. They should confirm that the supported Modelsim and Questa versions for this key satisfy their needs.
  User Interface Enhancements in 10.5
  - dvt10305 - The [add log], [add wave] and [add list] commands have the new -filter and -nofilter switches to allow a one-time modification of the WildcardFilter in the command invocation. The commands can take as many [-filter <f>] and [-nofilter <f>] arguments as the user would like to specify. The valid filters are exactly the same set of words that can be applied to the WildcardFilter. The filter used during a command starts with the WildcardFilter and then applies the user specified filters, if any. The -filter values are added to the filter, the -nofilter values are removed from the filter. They are applied in the order specified so conflicts are resolved with the last specified wins.
  - [nodvtid] - (results) A new feature called VHDL Access Path Expressions has been introduced which provides improved visibility and a more intuitive way of viewing VHDL access variables and objects in the Wave Window. Some of the features of vhdl access path expressions are:
    - More descriptive pointer values. Values are Dynamic Object Identifiers instead of hexadecimal memory address.
    - Access references may be expanded in place in the wave window rather than having to inspect individual access objects one by one.
    - Ability to add access_var.all to see dereferenced object values.
    - Ability to "cast" unconstrained arrays to constrained array type.
    - The [accessinfo] command gives metrix and reports about access object usage.
    - Enabled with -accessobjdebug switch or AccessObjDebug modelsim.ini variable setting.
  - dvt27751 - Support two new variations for the "bp" command. Allows specifying the line-number only in the command. The command will use the source file of the current context. For example:
```
    bp 57
```
    The "bp" command will also accept the common gdb syntax of "file-name:line-number", for example:
```
    bp dut.sv:57
```
    Here is the full usage description for the "bp" command:
```
# Usage:
# HDL breakpoints:
#  bp location [options] [{command ...}]
#    location: {[filename] line_number | filename:line_number | in task_or_fcn}
#    options: [-id id#] [-label label] [-disable] [-uvm] [[-inst region]...]
#             [-cond {condition_expression}] [-appendinst]
# 
# C breakpoints:
#  bp -c location [options]
#    location: {function_name | line_number | filename:line_number | *0xhex_address}
#    options: [-disable] [[-inst {systemc_module_instance_name}]...]
#             [-cond {condition_expression}] [-appendinst]
# 
# Information:
#   bp [-query filename [line_number [line_number]]]
```
  - dvt9844 - The "when" command has been enhanced to support repeating time breakpoints. The -repeat switch works with "when" breakpoint expressions involving time ($now). Normally expressions involving $now will only trigger once. With the -repeat option the "when" breakpoint will reestablish the breakpoint when triggered so that it will fire again for the next time period.
  - dvt78258 - (results) Scripting of the simulator now supports nested "vsim -do" operations. The do-file specified in a vsim command that contains another vsim command with it's own do-file option will now execute the nested do-file. Previously, the -do option in a nested vsim command was ignored, with a warning. Existing scripts that have "vsim -do" commands will see different behavior.
  - [nodvtid] - (results) Vsim has always wrapped long output lines in the transcript file. Lines longer than 3000 characters are wrapped onto subsequent lines. There are now two new control settings that effect this wrapping behavior. The settings can be modified by changing variables in the modelsim.ini file, or by using two new "transcript" commands in a do file.
    WrapMode: The WrapMode variable controls wrapping of output lines in the transcript file. A mode of 0 will turn off wrapping, mode 1 enables wrapping, and mode 2 enables wrapping and adds a continuation character, '\', at the end of each wrapped line except the last one. The default value for WrapMode is 0. (Note: this is a change from the behavior in 10.4).
    WrapColumn: The WrapColumn variable defines the column width where the line gets wrapped. This column is somewhat soft; the wrap will occur at the first white-space character after reaching the WrapWSColumn column or at exactly the column width if no white-space is found. The default value for WrapColumn is 30000.
    WrapWSColumn: The wrap will occur at the first white-space character after reaching the WrapWSColumn. If there is no white-space, the wrap will occur at the WrapColumn. The default value for WrapWSColumn is 27000.
    The command form of these variables are "transcript wrapmode ?n?", "transcript wrapcolumn ?n?", and "transcript wrapwscolumn ?n?", respectively.
  - dvt33631 - Wildcard expansion in the "add watch" command is limited to 150 items. A dialog box is presented allowing the user to accept the limit or cancel the operation. Accepting the limit will add the first 150 items to the window.
  - dvt82309 - The Search bar entry box will now grow to to use all available space in the width of the window.
  - dvt83067 - The Class Type column is now visible by default in the Covergroup WIndow.
  - dvt21036 - The Search bar options such as Exact Match and Case Sensitive, have been made persistent between sessions.
  SystemVerilog Enhancements in 10.5
  - dvt70976 - (results) SystemVerilog strings are now reported separately from dynamic arrays in the capacity report.
  - dvt76148 - The -override_precision compiler switch allows the time units setting from a -timescale command line option to be used to override the `timescale setting of all modules.
  - [nodvtid] - (source, results) There has been a change in the VPI interface to vpiAssertion class objects. The SystemVerilog 2012 LRM indicates that vpiAssertion objects may be iterated for from vpiInstance class objects only, not from all vpiScopes, however assertion objects may in fact be under other scope class parents. We have previously added these sub-scope descendant assertions to the instance assertion. This change makes the assertion iteration valid on all scope objects to bring it into line with similar vpiVariable iterations. A consequence is that sub-scope iterations are necessary to find all the assertions in an instance.
  - dvt79719 - Nets declared with a user-defined nettype are supported in this release.
  - dvt81658 - Allow parameter type initialization from an interface port parameter type.
  - dvt83013 - The protected state of a design unit can now be changed by recompiling. In the past this seemed to work with Verilog but was intentionally not allowed with VHDL. Now, both languages allow this, and the implementation has been made more uniform and correct.
  - dvt83697 - SV variables having an initializer in the declaration are not allowed to trigger an always block at time zero, whereas in V2K mode those assignments do trigger top-blocking always blocks. Use the -svext=defervda compiler option to have these SV initializers trigger top-blocking always blocks.
  - [nodvtid] - Added a vlog and vopt -svext=tzas option that runs a top-blocking always @* at time zero, same as is done for an always_comb, meaning that the always block will behave as though triggered at time zero even if none of the variables and nets in the implied sensitivity change value at time zero.
  SystemC Enhancements in 10.5
  - dvt75791 - Existing vsim switch -undefsyms is extended to vopt.
  - [nodvtid] - Accellera SystemC-2.3.1 version is now supported. Experimental features in this version that are enabled by SC_ENABLE_SIMULATION_PHASE_CALLBACKS and SC_ENABLE_SIMULATION_PHASE_CALLBACKS_TRACING defines are not supported.
  - [nodvtid] - The Accellera SystemC Verification Library (SCV-2.0.0) is now supported with SystemC-2.3.1 and SystemC-2.2
  Coverage Enhancements in 10.5
  - [nodvtid] - vcover parallelmerge command now supports auto-rerun feature for failed parallel processes (due to either job submission or merge failure). Job submission failures are rerun by default. Merge failure rerun can be enabled with -mergererun option. Number of retries for both rerun types can be controlled with -maxrerun option.
```
-maxrerun < val >            : Specify maximum number of times job queue, timeouts
                               or merge failure processes are rerun automatically. (Default: 10)
                               Specifying 0 will disable reruns for all failures types
-mergererun                  : Allow merge failure processes to rerun automatically
```
  - [nodvtid] - vcover parallelmerge command allows user to override temporary directory path.
```
     -tempdir "< dir_path >"        : Specify temporary directory for intermediate output
                                      (Default: "$cwd/TEMP_MERGE_DIR")
```
  - dvt28804 - (results) The -checkinputs switch is added in vcover merge to skip and report corrupted UCDB input files.